Mapping Large Combinational Circuits With K-Lut based FPGAS Using Homogenous Dominating Cones
- Authors
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Ion I. Bucur
University "Politehnica" of Bucharest, Department of Computer Science and Engineering
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Alexandru Susu
University "Politehnica" of Bucharest, Department of Computer Science and Engineering
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- Abstract
- Partitioning is a technique of dividing a circuit or system into a collection of smaller blocks (sub-circuits) with roughly equal sizes targeting to minimize the number of interconnections between the blocks. Due to the limited mapping resource of k-LUT FPGAs, large combinational circuits partitioning is of practical importance for k-LUT based FPGA circuit implementation. In this paper is presented multilevel multi-resource partitioning algorithm for partitioning large combinational circuits in order to efficiently use existing and commercially available FPGAs packages.
- References
- Downloads
- Published
- 2006-09-30
- Issue
- Vol. 8 No. 3 (2006)
- Section
- Articles